View LT1963-18_2733534.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 lt1963 series typical applicatio n u applicatio s u features descriptio u 1.5a, low noise, fast transient response ldo regulators n optimized for fast transient response n output current: 1.5a n dropout voltage: 340mv n low noise: 40 m v rms (10hz to 100khz) n 1ma quiescent current n no protection diodes needed n controlled quiescent current in dropout n fixed output voltages: 1.5v, 1.8v, 2.5v, 3.3v n adjustable output from 1.21v to 20v n <1 m a quiescent current in shutdown n stable with 10 m f output capacitor n stable with ceramic capacitors n reverse battery protection n no reverse current n thermal limiting the lt ? 1963 series are low dropout regulators optimized for fast transient response. the devices are capable of supplying 1.5a of output current with a dropout voltage of 340mv. operating quiescent current is 1ma, dropping to <1 m a in shutdown. quiescent current is well controlled; it does not rise in dropout as it does with many other regulators. in addition to fast transient response, the lt1963 regulators have very low output noise which makes them ideal for sensitive rf supply applications. output voltage range is from 1.21v to 20v. the lt1963 regulators are stable with output capacitors as low as 10 m f. small ceramic capacitors can be used without the necessary addition of esr as is common with other regulators. internal protection circuitry includes reverse battery protection, current limiting, thermal limiting and reverse current protection. the devices are available in fixed output voltages of 1.5v, 1.8v, 2.5v, 3.3v and as an adjustable device with a 1.21v reference voltage. the lt1963 regulators are available in 5-lead to-220, dd, 3-lead sot-223 and 8-lead so packages. 3.3v to 2.5v regulator n 3.3v to 2.5v logic power supplies n post regulator for switching supplies , ltc and lt are registered trademarks of linear technology corporation. in shdn 10 f 1963 ta01 out v in > 3v sense gnd lt1963-2.5 2.5v 1.5a 10 f + + output current (a) 0 dropout voltage (mv) 200 300 1.6 1963 ta02 100 0 0.4 0.8 1.2 0.2 0.6 1.0 1.4 400 150 250 50 350 dropout voltage
2 lt1963 series parameter conditions min typ max units minimum input voltage (notes 4,12) i load = 0.5a 1.9 v i load = 1.5a l 2.1 2.5 v regulated output voltage (note 5) lt1963-1.5 v in = 2.21v, i load = 1ma 1.477 1.500 1.523 v 2.5v < v in < 20v, 1ma < i load < 1.5a l 1.447 1.500 1.545 v lt1963-1.8 v in = 2.3v, i load = 1ma 1.773 1.800 1.827 v 2.8v < v in < 20v, 1ma < i load < 1.5a l 1.737 1.800 1.854 v (note 1) in pin voltage ........................................................ 20v out pin voltage .................................................... 20v input to output differential voltage (note 2) ......... 20v sense pin voltage ............................................... 20v adj pin voltage ...................................................... 7v shdn pin voltage ................................................. 20v output short-circuit duration ......................... indefinite operating junction temperature range C 45 c to 125 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c the l denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. (note 3) absolute axi u rati gs w ww u electrical characteristics consult factory for industrial and military grade parts. order part number lt1963eq lt1963eq-1.5 lt1963eq-1.8 lt1963eq-2.5 lt1963eq-3.3 t jmax = 150 c, q ja = 30 c/ w *pin 5 = sense for lt1963-1.8/lt1963-2.5/lt1963-3.3 = adj for lt1963 order part number lt1963et lt1963et-1.5 lt1963et-1.8 lt1963et-2.5 lt1963et-3.3 *pin 5 = sense for lt1963-1.8/lt1963-2.5/lt1963-3.3 = adj for lt1963 t jmax = 150 c, q ja = 50 c/ w q package 5-lead plastic dd tab is gnd front view sense/adj* out gnd in shdn 5 4 3 2 1 t package 5-lead plastic to-220 sense/adj* out gnd in shdn front view tab is gnd 5 4 3 2 1 1 2 3 front view tab is gnd out gnd in st package 3-lead plastic sot-223 t jmax = 150 c, q ja = 50 c/ w lt1963est-1.5 lt1963est-1.8 lt1963est-2.5 lt1963est-3.3 order part number lt1963es8 lt1963es8-1.5 lt1963es8-1.8 lt1963es8-2.5 lt1963es8-3.3 order part number 1 2 3 4 8 7 6 5 top view in gnd gnd shdn out sense/adj* gnd nc s8 package 8-lead plastic so *pin 2 = sense for lt1963-1.8/lt1963-2.5/lt1963-3.3 = adj for lt1963 t jmax = 150 c, q ja = 70 c/ w package/order i for atio uu w st part marking 1963 196315 196318 196325 196333 s8 part marking 196315 196318 196325 196333
3 lt1963 series parameter conditions min typ max units lt1963-2.5 v in = 3v, i load = 1ma 2.462 2.500 2.538 v 3.5v < v in < 20v, 1ma < i load < 1.5a l 2.412 2.500 2.575 v lt1963-3.3 v in = 3.8v, i load = 1ma 3.250 3.300 3.350 v 4.3v < v in < 20v, 1ma < i load < 1.5a l 3.200 3.300 3.400 v adj pin voltage lt1963 v in = 2.21v, i load = 1ma 1.192 1.210 1.228 v (notes 4, 5) 2.5v < v in < 20v, 1ma < i load < 1.5a l 1.174 1.210 1.246 v line regulation lt1963-1.5 d v in = 2.21v to 20v, i load = 1ma l 2.0 10 mv lt1963-1.8 d v in = 2.3v to 20v, i load = 1ma l 2.5 10 mv lt1963-2.5 d v in = 3v to 20v, i load = 1ma l 3.0 10 mv lt1963-3.3 d v in = 3.8v to 20v, i load = 1ma l 3.5 10 mv lt1963 (note 4) d v in = 2.21v to 20v, i load = 1ma l 1.5 10 mv load regulation lt1963-1.5 v in = 2.5v, d i load = 1ma to 1.5a 2 9 mv v in = 2.5v, d i load = 1ma to 1.5a l 18 mv lt1963-1.8 v in = 2.8v, d i load = 1ma to 1.5a 2 10 mv v in = 2.8v, d i load = 1ma to 1.5a l 20 mv lt1963-2.5 v in = 3.5v, d i load = 1ma to 1.5a 2.5 15 mv v in = 3.5v, d i load = 1ma to 1.5a l 30 mv lt1963-3.3 v in = 4.3v, d i load = 1ma to 1.5a 3 20 mv v in = 4.3v, d i load = 1ma to 1.5a l 35 mv lt1963 (note 4) v in = 2.5v, d i load = 1ma to 1.5a 2 8 mv v in = 2.5v, d i load = 1ma to 1.5a l 15 mv dropout voltage i load = 1ma 0.02 0.06 v v in = v out(nominal) i load = 1ma l 0.10 v (notes 6, 7, 12) i load = 100ma 0.10 0.17 v i load = 100ma l 0.22 v i load = 500ma 0.19 0.27 v i load = 500ma l 0.35 v i load = 1.5a 0.34 0.45 v i load = 1.5a l 0.55 v gnd pin current i load = 0ma l 1.0 1.5 ma v in = v out(nominal) + 1v i load = 1ma l 1.1 1.6 ma (notes 6, 8) i load = 100ma l 3.8 5.5 ma i load = 500ma l 15 25 ma i load = 1.5a l 80 120 ma output voltage noise c out = 10 m f, i load = 1.5a, bw = 10hz to 100khz 40 m v rms adj pin bias current (notes 4, 9) 3 10 m a shutdown threshold v out = off to on l 0.90 2 v v out = on to off l 0.25 0.75 v shdn pin current v shdn = 0v 0.01 1 m a (note 10) v shdn = 20v 3 30 m a quiescent current in shutdown v in = 6v, v shdn = 0v 0.01 1 m a ripple rejection v in C v out = 1.5v (avg), v ripple = 0.5v p-p ,5563db f ripple = 120hz, i load = 0.75a current limit v in = 7v, v out = 0v 2 a v in = v out(nominal) + 1v, d v out = C 0.1v l 1.6 a input reverse leakage current (note 13) q, t, s8 packages v in = C 20v, v out = 0v l 1ma st package v in = C 20v, v out = 0v l 2ma reverse output current (note 11) lt1963-1.5 v out = 1.5v, v in < 1.5v 600 1200 m a lt1963-1.8 v out = 1.8v, v in < 1.8v 600 1200 m a lt1963-2.5 v out = 2.5v, v in < 2.5v 600 1200 m a lt1963-3.3 v out = 3.3v, v in < 3.3v 600 1200 m a lt1963 (note 4) v out = 1.21v, v in < 1.21v 300 600 m a the l denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. (note 2) electrical characteristics
4 lt1963 series electrical characteristics typical perfor a ce characteristics uw output current (a) 0 dropout voltage (mv) 500 450 400 350 300 250 200 150 100 50 0 0.4 0.8 1.0 1963 ?g01 0.2 0.6 1.2 1.4 1.6 t j = 125 c t j = 25 c output current (a) guaranteed dropout voltage (mv) 600 500 400 300 200 100 0 0 0.4 0.8 1.0 1963 ?g02 0.2 0.6 1.2 1.4 1.6 t j 125 c t j 25 c test points temperature ( c) ?0 dropout voltage (mv) 500 450 400 350 300 250 200 150 100 50 0 0 50 75 1963 g03 ?5 25 100 125 i l = 100ma i l = 1ma i l = 0.5a i l = 1.5a temperature ( c) ?0 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 25 75 1963 g04 ?5 0 50 100 125 quiescent current (ma) lt1963-1.8/-2.5/-3.3 lt1963 v in = 6v r l = , i l = 0 v shdn = v in temperature ( c) ?0 output voltage (v) 100 1963 g05 050 1.84 1.83 1.82 1.81 1.80 1.79 1.78 1.77 1.76 25 25 75 125 i l = 1ma temperature ( c) ?0 output voltage (v) 100 1963 g06 050 2.58 2.56 2.54 2.52 2.50 2.48 2.46 2.44 2.42 25 25 75 125 i l = 1ma typical dropout voltage guaranteed dropout voltage dropout voltage quiescent current lt1963-1.8 output voltage lt1963-2.5 output voltage note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: absolute maximum input to output differential voltage can not be achieved with all combinations of rated in pin and out pin voltages. with the in pin at 20v, the out pin may not be pulled below 0v. the total measured voltage from in to out can not exceed 20v. note 3: the lt1963 regulators are tested and specified under pulse load conditions such that t j ? t a . the lt1963 is 100% tested at t a = 25 c. performance at C 40 c and 125 c is assured by design, characterization and correlation with statistical process controls. note 4: the lt1963 (adjustable version) is tested and specified for these conditions with the adj pin connected to the out pin. note 5: operating conditions are limited by maximum junction temperature. the regulated output voltage specification will not apply for all possible combinations of input voltage and output current. when operating at maximum input voltage, the output current range must be limited. when operating at maximum output current, the input voltage range must be limited. note 6: to satisfy requirements for minimum input voltage, the lt1963 (adjustable version) is tested and specified for these conditions with an external resistor divider (two 4.12k resistors) for an output voltage of 2.4v. the external resistor divider will add a 300 m a dc load on the output. note 7: dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. in dropout, the output voltage will be equal to: v in C v dropout . note 8: gnd pin current is tested with v in = v out(nominal) + 1v and a current source load. the gnd pin current will decrease at higher input voltages. note 9: adj pin bias current flows into the adj pin. note 10: shdn pin current flows into the shdn pin. note 11: reverse output current is tested with the in pin grounded and the out pin forced to the rated output voltage. this current flows into the out pin and out the gnd pin. note 12. for the lt1963, lt1963-1.5 and lt1963-1.8 dropout voltage will be limited by the minimum input voltage specification under some output voltage/load conditions. note 13. for the st package, the input reverse leakage current increases due to the additional reverse leakage current for the shdn pin, which is tied internally to the in pin.
5 lt1963 series temperature ( c) ?0 output voltage (v) 100 1963 g07 050 3.38 3.36 3.34 3.32 3.30 3.28 3.26 3.24 3.22 25 25 75 125 i l = 1ma temperature ( c) ?0 adj pin voltage (v) 100 1963 g08 050 1.230 1.225 1.220 1.215 1.210 1.205 1.200 1.195 1.190 25 25 75 125 i l = 1ma input voltage (v) 0 quiescent current (ma) 14 12 10 8 6 4 2 0 1963 g09 2 5678910 1 34 t j = 25 c r l = v shdn = v in typical perfor a ce characteristics uw lt1963-3.3 output voltage input voltage (v) 0 quiescent current (ma) 14 12 10 8 6 4 2 0 1963 g10 2 10 56789 1 34 t j = 25 c r l = v shdn = v in input voltage (v) 0 quiescent current (ma) 14 12 10 8 6 4 2 0 1963 g11 2 10 56789 1 34 t j = 25 c r l = v shdn = v in input voltage (v) 0 quiescent current (ma) 14 12 10 8 6 4 2 0 1963 g12 4 20 10 12 14 16 18 2 68 t j = 25 c r l = 4.3k v shdn = v in input voltage (v) 0 gnd pin current (ma) 25 20 15 10 5 0 4 1963 g13 1 2 3 10 9 8 7 6 5 t j = 25 c v shdn = v in *for v out = 1.18v r l = 180, i l = 10ma* r l = 18, i l = 100ma* r l = 6, i l = 300ma* input voltage (v) 0 gnd pin current (ma) 25 20 15 10 5 0 4 1963 g14 1 2 3 10 9 8 7 6 5 r l = 250, i l = 10ma* r l = 25, i l = 100ma* r l = 8.33, i l = 300ma* t j = 25 c v shdn = v in *for v out = 2.5v input voltage (v) 0 gnd pin current (ma) 25 20 15 10 5 0 4 1963 g15 1 2 3 10 9 8 7 6 5 r l = 330, i l = 100ma* r l = 33, i l = 100ma* r l = 11, i l = 300ma* t j = 25 c v shdn = v in *for v out = 3.3v lt1963 adj pin voltage lt1963-1.8 quiescent current lt1963-2.5 quiescent current lt1963-3.3 quiescent current lt1963 quiescent current lt1963-1.8 gnd pin current lt1963-2.5 gnd pin current lt1963-3.3 gnd pin current
6 lt1963 series typical perfor a ce characteristics uw input voltage (v) 0 gnd pin current (ma) 10 8 6 4 2 0 4 1963 g16 1 2 3 10 9 8 7 6 5 r l = 121, i l = 10ma* r l = 12.1, i l = 100ma* r l = 4.33, i l = 300ma* t j = 25 c v shdn = v in *for v out = 1.21v input voltage (v) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963 g17 0123 4 5 67 8910 r l = 1.8, i l = 1a* r l = 1.2, i l = 1.5a* r l = 3.6, i l = 500ma* t j = 25 c v shdn = v in *for v out = 1.8v input voltage (v) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963 g18 0123 4 5 67 8910 r l = 2.5, i l = 1a* r l = 1.67, i l = 1.5a* r l = 5, i l = 500ma* t j = 25 c v shdn = v in *for v out = 2.5v input voltage (v) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963 g19 0123 4 5 67 8910 r l = 3.3, i l = 1a* r l = 2.2, i l = 1.5a* r l = 6.6, i l = 500ma* t j = 25 c v shdn = v in *for v out = 3.3v input voltage (v) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963 g20 0123 4 5 67 8910 r l = 1.21, i l = 1a* r l = 0.81, i l = 1.5a* r l = 2.42, i l = 500ma* t j = 25 c v shdn = v in *for v out = 1.21v output current (a) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963 g21 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 v in = v out (nominal) +1v temperature ( c) ?0 shdn pin threshold (v) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 50 75 1963 g23 ?5 25 100 125 i l = 1ma i l = 1.5a shdn pin voltage (v) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 shdn pin input current ( a) 1963 g24 0246 8 10 12 14 16 18 20 temperature ( c) ?0 shdn pin threshold (v) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 50 75 1963 g22 ?5 25 100 125 i l = 1ma lt1963 gnd pin current lt1963-1.8 gnd pin current lt1963-2.5 gnd pin current lt1963-3.3 gnd pin current lt1963 gnd pin current gnd pin current vs i load shdn pin threshold (on-to-off) shdn pin threshold (off-to-on) shdn pin input current
7 lt1963 series shdn pin input current typical perfor a ce characteristics uw temperature ( c) ?0 7 6 5 4 3 2 1 0 25 75 1963 g25 ?5 0 50 100 125 shdn pin input current ( a) v shdn = 20v temperature ( c) ?0 adj pin bias current ( a) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 50 75 1963 g26 ?5 25 100 125 input/output differential (v) 02 6 10 14 18 current limit (a) 3.0 2.5 2.0 1.5 1.0 0.5 0 4 8 12 16 1963 g27 20 t j = 125 c t j = 25 c t j = 50 c d v out = 100mv adj pin bias current current limit current limit output voltage (v) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 reverse output current (ma) 1963 g29 0123 4 5 67 8910 lt1963 lt1963-1.8 lt1963-3.3 lt1963-2.5 t j = 25 c v in = 0v current flows into output pin v out = v adj (lt1963) v out = v fb (lt1963-1.8/-2.5/-3.3) temperature ( c) ?0 reverse output current (ma) 0 50 75 1963 g30 ?5 25 100 125 lt1963-1.8/-2.5/-3.3 lt1963 v in = 0v v out = 1.21v (lt1963) v out = 1.8v (lt1963-1.8) v out = 2.5v (lt1963-2.5) v out = 3.3v (lt1963-3.3) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 temperature ( c) ?0 current limit (a) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 50 75 1963 g28 ?5 25 100 125 v in = 7v v out = 0v reverse output current frequency (hz) ripple rejection (db) 80 70 60 50 40 30 20 10 0 10 1k 10k 1m 1963 g31 100 100k c out = 10 f tantalum c out = 100 f tantalum +10 1 f ceramic i l = 0.75a v in = v out(nominal) +1v + 50mv rms ripple temperature ( c) ?0 76 74 72 70 68 66 64 62 25 75 1963 g32 ?5 0 50 100 125 ripple rejection (db) i l = 0.75a v in = v out(nominal) +1v + 0.5v p-p ripple at f = 120hz reverse output current ripple rejection ripple rejection
8 lt1963 series typical perfor a ce characteristics uw temperature ( c) ?0 minimum input voltage (v) 3.0 2.5 2.0 1.5 1.0 0.5 0 25 75 1963 g33 ?5 0 50 100 125 i l = 1.5a i l = 500ma i l = 100ma temperature ( c) ?0 load regulation (mv) 10 5 0 ? ?0 ?5 ?0 25 75 1963 g34 ?5 0 50 100 125 lt1963 lt1963-3.3 lt1963-1.8 lt1963-2.5 v in = v out(nominal) +1v (lt1963-1.8/-2.5/-3.3) v in = 2.7v (lt1963) ? i l = 1ma to 1.5a frequency (hz) 10 0.01 output noise spectral density ( v/ ? hz) 0.1 1.0 1k 100k 1963 g35 100 10k c out = 10 f i l =1.5a lt1963-3.3 lt1963-2.5 lt1963-1.8 lt1963 load current (a) output noise voltage ( v rms ) 50 45 40 35 30 25 20 15 10 5 0 0.0001 0.01 0.1 10 1063 g36 0.001 1 c out = 10 f lt1963-3.3 lt1963-2.5 lt1963-1.8 lt1963 v out 100 v/div 1ms/div c out = 10 f i load = 1.5a 1963 g37 time ( s) 200 150 100 50 0 ?0 ?00 0.6 0.4 0.2 0 output voltage deviation (mv) 1963 g38 0246 8 10 12 14 16 18 20 v in = 4.3v c in = 3.3 f tantalum c out = 10 f tantalum load current (a) time ( s) 150 100 50 0 ?0 ?00 ?50 1.5 1.0 0.5 0 output voltage deviation (mv) load current (a) 1963 g39 0 50 100 150 250 300 350 400 450 500 200 v in = 4.3v c in = 33 f tantalum c out = 100 f tantalum +10 1 f ceramic lt1963 minimum input voltage load regulation output noise spectral density rms output noise vs load current (10hz to 100khz) lt1963-3.3 10hz to 100khz output noise lt1963-3.3 transient response lt1963-3.3 transient response
9 lt1963 series figure 1. kelvin sense connection in shdn 1963 f01 r p out v in sense gnd lt1963 r p + + load uu u pi fu ctio s out: output. the output supplies power to the load. a minimum output capacitor of 10 m f is required to prevent oscillations. larger output capacitors will be required for applications with large transient loads to limit peak voltage transients. see the applications information section for more information on output capacitance and reverse output characteristics. sense: sense. for fixed voltage versions of the lt1963 (lt1963-1.8/lt1963-2.5/lt1963-3.3), the sense pin is the input to the error amplifier. optimum regulation will be obtained at the point where the sense pin is connected to the out pin of the regulator. in critical applications, small voltage drops are caused by the resistance (r p ) of pc traces between the regulator and the load. these may be elimi- nated by connecting the sense pin to the output at the load as shown in figure 1 (kelvin sense connection). note that the voltage drop across the external pc traces will add to the dropout voltage of the regulator. the sense pin bias current is 600 m a at the nominal rated output voltage. the sense pin can be pulled below ground (as in a dual supply system where the regulator load is returned to a negative supply) and still allow the device to start and operate. adj: adjust. for the adjustable lt1963, this is the input to the error amplifier. this pin is internally clamped to 7v. it has a bias current of 3 m a which flows into the pin. the adj pin voltage is 1.21v referenced to ground and the output voltage range is 1.21v to 20v. shdn: shutdown. the shdn pin is used to put the lt1963 regulators into a low power shutdown state. the output will be off when the shdn pin is pulled low. the shdn pin can be driven either by 5v logic or open-collector logic with a pull-up resistor. the pull-up resistor is required to supply the pull-up current of the open-collector gate, normally several microamperes, and the shdn pin cur- rent, typically 3 m a. if unused, the shdn pin must be connected to v in . the device will be in the low power shutdown state if the shdn pin is not connected. in: input. power is supplied to the device through the in pin. a bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. in general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. a bypass capacitor in the range of 1 m f to 10 m f is sufficient. the lt1963 regu- lators are designed to withstand reverse voltages on the in pin with respect to ground and the out pin. in the case of a reverse input, which can happen if a battery is plugged in backwards, the device will act as if there is a diode in series with its input. there will be no reverse current flow into the regulator and no reverse voltage will appear at the load. the device will protect both itself and the load.
10 lt1963 series figure 2. adjustable operation in 1963 f02 r2 out v in v out adj gnd lt1963 r1 + vv r r ir vv ia out adj adj adj =+ ? ? ? ? + ()() = = 121 1 2 1 2 121 3 . . m at 25 c output range = 1.21v to 20v figure 3. ceramic capacitor dc bias characteristics applicatio s i for atio wu uu dc bias voltage (v) change in value (%) 1963 f03 20 0 ?0 ?0 ?0 ?0 100 0 4 8 10 26 12 14 x5r y5v 16 both capacitors are 16v, 1210 case size, 10 f the lt1963 series are 1.5a low dropout regulators opti- mized for fast transient response. the devices are capable of supplying 1.5a at a dropout voltage of 350mv. the low operating quiescent current (1ma) drops to less than 1 m a in shutdown. in addition to the low quiescent current, the lt1963 regulators incorporate several protection features which make them ideal for use in battery-powered sys- tems. the devices are protected against both reverse input and reverse output voltages. in battery backup applica- tions where the output can be held up by a backup battery when the input is pulled to ground, the lt1963-x acts like it has a diode in series with its output and prevents reverse current flow. additionally, in dual supply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as 20v and still allow the device to start and operate. adjustable operation the adjustable version of the lt1963 has an output voltage range of 1.21v to 20v. the output voltage is set by the ratio of two external resistors as shown in figure 2. the device servos the output to maintain the voltage at the adj pin at 1.21v referenced to ground. the current in r1 is then equal to 1.21v/r1 and the current in r2 is the current in r1 plus the adj pin bias current. the adj pin bias current, 3 m a at 25 c, flows through r2 into the adj pin. the output voltage can be calculated using the formula in figure 2. the value of r1 should be less than 4.17k to minimize errors in the output voltage caused by the adj pin bias current. note that in shutdown the output is turned off and the divider current will be zero. the adjustable device is tested and specified with the adj pin tied to the out pin for an output voltage of 1.21v. specifications for output voltages greater than 1.21v will be proportional to the ratio of the desired output voltage to 1.21v: v out /1.21v. for example, load regulation for an output current change of 1ma to 1.5a is C 3mv typical at v out = 1.21v. at v out = 5v, load regulation is: (5v/1.21v)(C3mv) = C 12.4mv output capacitance and transient response the lt1963 regulators are designed to be stable with a wide range of output capacitors. the esr of the output capacitor affects stability, most notably with small capaci- tors. a minimum output capacitor of 10 m f with an esr of 3 w or less is recommended to prevent oscillations. larger values of output capacitance can decrease the peak devia- tions and provide improved transient response for larger load current changes. bypass capacitors, used to decouple individual components powered by the lt1963, will in- crease the effective output capacitor value. extra consideration must be given to the use of ceramic capacitors. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. the most common dielectrics used are z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitances in a small package, but exhibit strong voltage and tem- perature coefficients as shown in figures 3 and 4. when used with a 5v regulator, a 10 m f y5v capacitor can exhibit
11 lt1963 series figure 4. ceramic capacitor temperature characteristics applicatio s i for atio wu uu temperature ( c) ?0 40 20 0 ?0 ?0 ?0 ?0 100 25 75 1963 f04 ?5 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v, 1210 case size, 10 f an effective value as low as 1 m f to 2 m f over the operating temperature range. the x5r and x7r dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. the x7r type has better stability across temperature, while the x5r is less expensive and is available in higher values. voltage and temperature coefficients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or micro- phone works. for a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. overload recovery like many ic power regulators, the lt1963-x has safe operating area protection. the safe area protection de- creases the current limit as input-to-output voltage in- creases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. the protection is designed to provide some output current at all values of input-to-output voltage up to the device breakdown. when power is first turned on, as the input voltage rises, the output follows the input, allowing the regulator to start up into very heavy loads. during the start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. with a high input voltage, a problem can occur wherein removal of an output short will not allow the output voltage to recover. other regulators, such as the lt1085, also exhibit this phenomenon, so it is not unique to the lt1963-x. the problem occurs with a heavy output load when the input voltage is high and the output voltage is low. com- mon situations are immediately after the removal of a short-circuit or when the shutdown pin is pulled high after the input voltage has already been turned on. the load line for such a load may intersect the output current curve at two points. if this happens, there are two stable output operating points for the regulator. with this double inter- section, the input power supply may need to be cycled down to zero and brought up again to make the output recover. output voltage noise the lt1963 regulators have been designed to provide low output voltage noise over the 10hz to 100khz bandwidth while operating at full load. output voltage noise is typi- cally 40nv/ ? hz over this frequency bandwidth for the lt1963 (adjustable version). for higher output voltages (generated by using a resistor divider), the output voltage noise will be gained up accordingly. this results in rms noise over the 10hz to 100khz bandwidth of 14 m v rms for the lt1963 increasing to 38 m v rms for the lt1963-3.3. higher values of output voltage noise may be measured when care is not exercised with regards to circuit layout and testing. crosstalk from nearby traces can induce unwanted noise onto the output of the lt1963-x. power supply ripple rejection must also be considered; the lt1963 regulators do not have unlimited power supply rejection and will pass a small portion of the input noise through to the output. thermal considerations the power handling capability of the device is limited by the maximum rated junction temperature (125 c). the power dissipated by the device is made up of two components: 1. output current multiplied by the input/output voltage differential: (i out )(v in C v out ), and
12 lt1963 series applicatio s i for atio wu uu 2. gnd pin current multiplied by the input voltage: (i gnd )(v in ). the gnd pin current can be found using the gnd pin current curves in the typical performance characteris- tics. power dissipation will be equal to the sum of the two components listed above. the lt1963 series regulators have internal thermal lim- iting designed to protect the device during overload conditions. for continuous normal conditions, the maxi- mum junction temperature rating of 125 c must not be exceeded. it is important to give careful consideration to all sources of thermal resistance from junction to ambi- ent. additional heat sources mounted nearby must also be considered. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. copper board stiffeners and plated through-holes can also be used to spread the heat gener- ated by power devices. the following tables list thermal resistance for several different board sizes and copper areas. all measurements were taken in still air on 1/16" fr-4 board with one ounce copper. table 1. q package, 5-lead dd copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 23 c/w 1000mm 2 2500mm 2 2500mm 2 25 c/w 125mm 2 2500mm 2 2500mm 2 33 c/w *device is mounted on topside table 2. so-8 package, 8-lead so copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 55 c/w 1000mm 2 2500mm 2 2500mm 2 55 c/w 225mm 2 2500mm 2 2500mm 2 63 c/w 100mm 2 2500mm 2 2500mm 2 69 c/w *device is mounted on topside. table 3. sot-223 package, 3-lead sot-223 copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 42 c/w 1000mm 2 2500mm 2 2500mm 2 42 c/w 225mm 2 2500mm 2 2500mm 2 50 c/w 100mm 2 2500mm 2 2500mm 2 56 c/w 1000mm 2 1000mm 2 1000mm 2 49 c/w 1000mm 2 0mm 2 1000mm 2 52 c/w *device is mounted on topside. t package, 5-lead to-220 thermal resistance (junction-to-case) = 4 c/w calculating junction temperature example: given an output voltage of 3.3v, an input voltage range of 4v to 6v, an output current range of 0ma to 500ma and a maximum ambient temperature of 50 c, what will the maximum junction temperature be? the power dissipated by the device will be equal to: i out(max) (v in(max) C v out ) + i gnd (v in(max) ) where, i out(max) = 500ma v in(max) = 6v i gnd at (i out = 500ma, v in = 6v) = 10ma so, p = 500ma(6v C 3.3v) + 10ma(6v) = 1.41w using a dd package, the thermal resistance will be in the range of 23 c/w to 33 c/w depending on the copper area. so the junction temperature rise above ambient will be approximately equal to: 1.41w(28 c/w) = 39.5 c the maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: t jmax = 50 c + 39.5 c = 89.5 c
13 lt1963 series applicatio s i for atio wu uu figure 5. reverse output current output voltage (v) 0 reverse output current (ma) 3.0 4.0 5.0 8 1963 f05 2.0 1.0 2.5 3.5 4.5 1.5 0.5 0 2 1 3 4 6 9 7 5 10 lt1963 v out = v adj lt1963-1.8 v out = v fb lt1963-2.5 v out = v fb t j = 25 c v in = 0v current flows into output pin lt1963-3.3 v out = v fb protection features the lt1963 regulators incorporate several protection features which make them ideal for use in battery-powered circuits. in addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the devices are protected against reverse input voltages, reverse output voltages and reverse voltages from output to input. current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. for normal opera- tion, the junction temperature should not exceed 125 c. the input of the device will withstand reverse voltages of 20v. current flow into the device will be limited to less than 1ma (typically less than 100 m a) and no negative voltage will appear at the output. the device will protect both itself and the load. this provides protection against batteries that can be plugged in backward. the output of the lt1963 can be pulled below ground without damaging the device. if the input is left open circuit or grounded, the output can be pulled below ground by 20v. for fixed voltage versions, the output will act like a large resistor, typically 5k or higher, limiting current flow to typically less than 600 m a. for adjustable versions, the output will act like an open circuit; no current will flow out of the pin. if the input is powered by a voltage source, the output will source the short-circuit current of the device and will protect itself by thermal limiting. in this case, grounding the shdn pin will turn off the device and stop the output from sourcing the short-circuit current. the adj pin of the adjustable device can be pulled above or below ground by as much as 7v without damaging the device. if the input is left open circuit or grounded, the adj pin will act like an open circuit when pulled below ground and like a large resistor (typically 5k) in series with a diode when pulled above ground. in situations where the adj pin is connected to a resistor divider that would pull the adj pin above its 7v clamp voltage if the output is pulled high, the adj pin input current must be limited to less than 5ma. for example, a resistor divider is used to provide a regulated 1.5v output from the 1.21v reference when the output is forced to 20v. the top resistor of the resistor divider must be chosen to limit the current into the adj pin to less than 5ma when the adj pin is at 7v. the 13v difference between out and adj pins divided by the 5ma maximum current into the adj pin yields a minimum top resistor value of 2.6k. in circuits where a backup battery is required, several different input/output conditions can occur. the output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open circuit. current flow back into the output will follow the curve shown in figure 5. when the in pin of the lt1963 is forced below the out pin or the out pin is pulled above the in pin, input current will typically drop to less than 2 m a. this can happen if the input of the device is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. the state of the shdn pin will have no effect on the reverse output current when the output is pulled above the input.
14 lt1963 series dimensions in inches (millimeters) unless otherwise noted. u package descriptio q package 5-lead plastic dd pak (ltc dwg # 05-08-1461) q(dd5) 1098 0.028 ?0.038 (0.711 ?0.965) 0.143 +0.012 0.020 () 3.632 +0.305 0.508 0.067 (1.70) bsc 0.013 ?0.023 (0.330 ?0.584) 0.095 ?0.115 (2.413 ?2.921) 0.004 +0.008 0.004 () 0.102 +0.203 0.102 0.050 0.012 (1.270 0.305) 0.059 (1.499) typ 0.045 ?0.055 (1.143 ?1.397) 0.165 ?0.180 (4.191 ?4.572) 0.330 ?0.370 (8.382 ?9.398) 0.060 (1.524) typ 0.390 ?0.415 (9.906 ?10.541) 15 typ 0.300 (7.620) 0.075 (1.905) 0.183 (4.648) 0.060 (1.524) 0.060 (1.524) 0.256 (6.502) bottom view of dd pak hatched area is solder plated copper heat sink 10vac at 115v in 10vac at 115v in + + + 750 +v +v +v +v +v 1/2 lt1018 1/2 lt1018 lt1006 10k 10k 10k 200k 0.1 f 22 f 1 f 0.033 f 1n4148 1n4148 lt1004 1.2v 750 a1 c1a c1b 34k* 12.1k* 3.3v out 1.5a l1 500 h 10000 f to all ?v points 22 f 1n4002 1n4002 1n4002 1n4148 ?ync 1k l2 90-140 vac 1963 ta03 lt1963-3.3 in shdn out fb gnd 2.4k + + + l1 = coiltronics ctx500-2-52 l2 = stancor p-8559 * = 1% film resistor = nte5437 typical applicatio s u scr pre-regulator provides efficiency over line variations
15 lt1963 series st package 3-lead plastic sot-223 (ltc dwg # 05-08-1630) dimensions in inches (millimeters) unless otherwise noted. u package descriptio t package 5-lead plastic to-220 (standard) (ltc dwg # 05-08-1421) t5 (to-220) 0399 0.028 ?0.038 (0.711 ?0.965) 0.067 (1.70) 0.135 ?0.165 (3.429 ?4.191) 0.700 ?0.728 (17.78 ?18.491) 0.045 ?0.055 (1.143 ?1.397) 0.095 ?0.115 (2.413 ?2.921) 0.013 ?0.023 (0.330 ?0.584) 0.620 (15.75) typ 0.155 ?0.195* (3.937 ?4.953) 0.152 ?0.202 (3.861 ?5.131) 0.260 ?0.320 (6.60 ?8.13) 0.165 ?0.180 (4.191 ?4.572) 0.147 ?0.155 (3.734 ?3.937) dia 0.390 ?0.415 (9.906 ?10.541) 0.330 ?0.370 (8.382 ?9.398) 0.460 ?0.500 (11.684 ?12.700) 0.570 ?0.620 (14.478 ?15.748) 0.230 ?0.270 (5.842 ?6.858) bsc seating plane * measured at the seating plane information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 0.114 ?0.124 (2.90 ?3.15) 0.248 ?0.264 (6.30 ?6.71) 0.130 ?0.146 (3.30 ?3.71) 0.264 ?0.287 (6.70 ?7.30) 0.0905 (2.30) nom 0.033 ?0.041 (0.84 ?1.04) 0.181 (4.60) nom 0.024 ?0.033 (0.60 ?0.84) 0.071 (1.80) max 10 max 0.012 (0.31) min 0.0008 ?0.0040 (0.0203 ?0.1016) 10 ?16 0.010 ?0.014 (0.25 ?0.36) 10 ?16 st3 (sot-233) 1298 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
16 lt1963 series part number description comments lt1120 125ma low dropout regulator with 20 m a i q includes 2.5v reference and comparator lt1121 150ma micropower low dropout regulator 30 m a i q , sot-223 package lt1129 700ma micropower low dropout regulator 50 m a quiescent current lt1175 500ma negative low dropout micropower regulator 45 m a i q , 0.26v dropout voltage, sot-223 package lt1521 300ma low dropout micropower regulator with shutdown 15 m a i q , reverse battery protection lt1529 3a low dropout regulator with 50 m a i q 500mv dropout voltage lt1772 constant frequency, current mode step-down dc/dc controller up to 94% efficiency, sot-23 package, 100% duty cycle ltc1627 high efficiency synchronous step-down switching regulator burst mode tm operation, monolithic, 100% duty cycle lt1761 series 100ma, low noise, low dropout micropower regulators in sot-23 20 m a quiescent current, 20 m v rms noise, sot-23 package lt1762 series 150ma, low noise, ldo micropower regulators 25 m a quiescent current, 20 m v rms noise, msop package lt1763 series 500ma, low noise, ldo micropower regulators 30 m a quiescent current, 20 m v rms noise, so-8 package lt1764 series 3a, fast transient response low dropout regulator 340mv dropout voltage, 40 m v rms noise lt1962 series 300ma, low noise, ldo micropower regulator 30 m a quiescent current, 20 m v rms noise, msop package burst mode is a trademark of linear technology corporation. 1963fs sn1963 lt/tp 0900 4k ? printed in usa ? linear technology corporation 2000 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com related parts lt1963-3.3 in shdn out fb gnd lt1963 in shdn out fb gnd + + r1 0.01 r2 0.01 r3 2.2k r4 2.2k r5 1k r6 6.65k r7 4.12k c1 100 f c3 0.01 f c2 22 f v in > 3.7v shdn 3.3v 3a 8 4 3 2 1 + 1/2 lt1366 1963 ta05 typical applicatio s u paralleling of regulators for higher output current + lt1004-1.2 v in > 2.7v c1 10 f r3 2k r1 1k r2 80.6k r4 2.2k r5 0.01 r6 2.2k lt1963-1.8 in shdn out fb gnd + 1/2 lt1366 r8 100k load r7 470 2 1 8 3 4 c3 1 f c2 3.3 f 1963 ta04 note: adjust r1 for 0a to 1.5a constant current adjustable current source

▲Up To Search▲

Price & Availability of LT1963-18

	To Download LT1963-18 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .